PAGE TOP

Fukuden News

2025/10/20

Introduction to PegaSim™ Mixed-Language Logic Simulation

PegaSim is a high-performance, mixed-language digital logic simulator. It leverages innovative algorithms to deliver high-speed simulation and a constraint-random solver.


PegaSim works seamlessly with Prodigy FPGA prototyping and cloud services, meeting a wide range of verification requirements—from IP and subsystem verification to full-system validation—accelerating SoC verification across multiple scenarios.



Key Features

· Supports various design and verification languages: Verilog, SystemVerilog, VHDL, and UVM methodology
· Code coverage analysis: Line/Block, Toggle, and Expression coverage
· Supports multiple processor architectures: x86, RISC-V, and ARM


As an authorized distributor of S2C products, we provide verification tool sales, verification services, and FPGA mapping services for both corporate and academic institutions.
We are committed to flexibly responding to the diverse needs of our customers — please feel free to contact us for more information.

Page top
Copyright(C) Fukuden Shizai Co., Ltd. All Rights Reserved.